1. Field of the Invention
The present invention relates to a memory device and a method of manufacturing the same, and more particularly, to a multi-bit electro-mechanical memory device and a method of manufacturing the multi-bit electro-mechanical memory device, in which predetermined data is programmed and read through switching operations of a plurality of cantilever electrodes that are symmetrically formed about a trench.
2. Description of Related Art
In general, memory devices that store information may be classified into volatile memory devices and non-volatile memory devices. Volatile memory devices, which can include dynamic random access memories (DRAMs), static random access memories (SRAMs) or the like, have a characteristic in that a data input/output operation is fast, but stored data is erased when power supplied to the volatile memory device is stopped. On the other hand, non-volatile memory devices, which can include erasable programmed read only memories (EPROM), electrically erasable programmed read only memories (EEPROM) or the like, have a characteristic in that a data input/output operation is slow, but stored data is maintained in the memory even though power supplied to the memory is stopped.
Such conventional memory devices are developed by employing metal oxide semiconductor field effect transistors (MOSFETs) based on metal oxide semiconductor (MOS) technologies. For example, a stack gate type transistor memory device has been developed having a structure stacked on a silicon semiconductor substrate, and a trench gate type transistor memory device has been developed having a structure in the semiconductor substrate. However, in conventional MOSFETs, a width and length of a channel should be longer than a predetermined length in order to prevent a short channel effect, and a thickness of a gate insulating layer formed between a gate electrode above the channel and the semiconductor substrate should be extremely thin. For this reason, it is difficult to implement a memory device having a nano-graded ultrafine structure.
Therefore, studies on memory devices having a structure capable of substituting for MOSFETs have been actively conducted. Recently, a micro electro-mechanical system (MEMS) technology and a nano electro-mechanical system (NEMS) technology, which are applied and developed from semiconductor technologies, have received attention. A non-volatile memory device using the MEMS technology has been disclosed in U.S. Pat. No. 6,054,745, incorporated herein by reference in its entirety.
Hereinafter, a conventional memory device will be described with reference to the accompanying drawings.
FIG. 1 is a cross-sectional view schematically illustrating a conventional memory device;
In the conventional memory device shown in FIG. 1, a field effect transistor (FET) sensing portion 221, a drawing electrode portion 223 and a cantilever electrode support portion 225 are formed on a shallow trench isolation (STI) 224 of a substrate 222 to be individually divided. A cantilever electrode 240 has a side 238 that is supported by the cantilever electrode support portion 225 while being electrically connected thereto, and the cantilever electrode 240 is formed to be spaced apart from the drawing electrode portion 223 and the FET sensing portion 221 at a predetermined height. Here, the cantilever electrode 240 can be bent in a direction of a drawing electrode 232 by an electric field induced in the drawing electrode portion 223. Thereafter, although the electric field induced in the drawing electrode portion 223 is eliminated, the cantilever electrode 240 can maintain its bent state due to an electric field induced from electrons captured in a poly-silicon gate electrode 230 of the FET sensing portion 221. For example, the poly-silicon gate electrode 230 corresponds to a floating electrode of a flash memory device, which captures electrons tunneled through a tunnel oxide layer made of a dielectric substance formed on a top surface of a source-drain region 227 of the FET sensing portion 221. The drawing electrode portion 223 and the cantilever electrode support portion 225 are made of a poly-silicon material, that is the same as a metal of the poly-silicon gate electrode 230. Similarly, the cantilever electrode 240 is made of a poly-silicon material from the cantilever electrode support portion 225.
Accordingly, the conventional memory device comprising the drawing electrode 232 allows the cantilever electrode 240 to be bent by an electrostatic force below the cantilever electrode 240 floated at a predetermined height. Further, the FET sensing portion 221 allows the cantilever electrode 240 to maintain its bent state, thereby implementing a non-volatile memory device.
However, the conventional memory device has several disadvantages. First, in the conventional memory device, the drawing electrode portion 223 allowing the cantilever electrode 240 having a horizontal state to be bent and the FET sensing portion 221 allowing the cantilever electrode 240 to maintain its bent state are separately formed on the same plane. In addition, the cantilever electrode 240 must be sufficiently long to be positioned over top portions of the drawing electrode portion 223 and the FET sensing portion 221. Thus, there is a disadvantage in that a degree of integration of the memory device is lowered.
Second, the conventional memory device allows only 1 bit of data per unit cell, the unit cell including the cantilever electrode 240, the drawing electrode 232 and the FET sensing portion 221, to be programmed or read in the conventional memory. Thus, it is difficult for multi-bit data to be stored in the conventional memory device.
Third, in the conventional memory device, each of the cantilever electrode 240 and the drawing electrode portion 223, which allows the cantilever electrode 240 to be bent down, is composed of a poly-silicon material having a resistance relatively higher than metal. Thus, power consumption can be undesirably increased.